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_______________ge ne ra l de sc ript ion the max887 high-efficiency, step-down dc-dc con- verter provides an adjustable output from 1.25v to 10.5v. it accepts inputs from 3.5v to 11v and deliv ers 600ma. operation to 100% duty cycle minimizes dropout voltage (300mv typ at 500ma). synchronous rectification reduces output rectifier losses, resu lting in efficiency as high as 95%. fixed-frequency pulse-width modulation (pwm) reduces noise in sensitive communications applica- tions. using a high-frequency internal oscillator a llows tiny surface-mount components to reduce pc board area, and eliminates audio-frequency interference. a sync input allows synchronization to an external cl ock to avoid interference with sensitive rf and data- acquisition circuits. the max887 features current-mode operation for supe - rior load/line-transient response. cycle-by-cycle c urrent limiting protects the internal mosfet and rectifier . a low-current (2.5a typ) shutdown mode conserves bat - tery life. ________________________applic a t ions portable instruments cellular phones and radios personal communicators distributed power systems computer peripherals ____________________________fe a t ure s ? 95% efficiency ? 600ma output current ? cycle-by-cycle current limiting ? low-dropout, 100% duty-cycle operation,300mv at 500ma ? internal 0.6 (typ) mosfet ? internal synchronous rectifier ? high-frequency current-mode pwm ? external sync or internal 300khz oscillator ? guaranteed 260khz to 340khz internal oscillatorfrequency limits ? 2.5a shutdown mode m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r ________________________________________________________________ maxim integrated products 1 1 2 8 7 v+ lx sync gnd shdn fb ref vl max887 so top view 3 4 6 5 __________________pin configura t ion max887 ref r1 165k w r2 100k w 0.047 m f 2.2 m f 47 m f 47 m f c1 100pf 0.33 m f 33 m h v+ lx fb gnd sync vl shdn v out = 3. 3v v out = 1.25v (r1/r2 + 1) v in = 3. 5v to 11v on off __________typic a l ope ra t ing circ uit 19-1142 rev 0; 9/96 part max887hc/d max887hesa -40c to +85c 0c to +70c temp. range pin-package dice* 8 so evaluation kit manual available ______________orde ring i nform a t ion * contact factory for availability. dice are tested a t t a = +25c. for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v+ = +7v, pgnd = gnd = 0v, shdn = v+, (t a = 0c to t max ) , unless otherwise noted.) stresses beyond those listed under absolute maximu m ratings may cause permanent damage to the device . these are stress ratings only, and functional operation of the device at these or any other condi tions beyond those indicated in the operational sec tions of the specifications is not implied. exposur e to absolute maximum rating conditions for extended per iods may affect device reliability. ref, fb, sync, vl to gnd........................... .......... -0.3v to +6v v+ to gnd .......................................... ................... -0.3v to +12v shdn , lx to gnd ....................................... - 0.3v to (v+ + 0.3v) pgnd to gnd ........................................ .............. -0.3v to +0.3v continuous power dissipation (t a = +70c) so (derate 9.09mw/c above +70c) ................. ........471mw operating temperature ranges max887hc/d......................................... ..............0c to +70c max887hesa ......................................... ..........-40c to +85c storage temperature range ......................... .. -65c to +165c lead temperature (soldering, 10sec) ................ ............ +300c sync = gnd or 3v i out = 0ma, sync = gnd v+ rising i out = 0ma, sync = 3.0v v+ falling v+ = floating, lx = 5v, shdn = gnd v+ = 12v, lx = gnd to 12v i lx = 100ma sync = 3.0v fb = 1.30v sync = 3.0v, pwm duty cycle = 50% shdn = gnd circuit of figure 2 i out = 0ma to 500ma v in = 4v to 11v, pwm mode sync = 3.0v, fb = 1.18v conditions v 2.4 v ih, shdn shdn input high voltage a 1 i in, sync sync input current v 0.5 v il, sync sync input low voltage v 2.5 v ih, sync sync input high voltage v 3.1 3.5 v +, start startup voltage v 3.0 3.3 v +, uvlo undervoltage lockout a 1.0 20 i lxlkgr lx reverse leakage current, regulator off a -10 1.0 10 i lxlkg lx leakage current 0.6 r on, lx lx on-resistance a 0.75 1.0 1.40 i lim+ high-side current limit khz 260 300 340 f osc pwm switching frequency shdn input low voltage v il, shdn % 100 pwm, duty pwm maximum duty cycle ma 0.2 0.5 i v+, pfm quiescent supply current (pfm mode) ma 2.7 4.0 i v+, pwm v 3.5 11.0 v+ supply range quiescent supply current (pwm mode) ns 500 sync, pw sync pulse width high or low khz 25 440 f sync sync frequency a 0.10 i fb fb input current v 1.225 1.250 1.275 v fb pwm fb feedback threshold a 2.5 5 i v+, shdn shutdown supply current v 1.25 10.50 v out, range output voltage range %/ma 0.005 load regulation %/v 0.2 line regulation units min typ max symbol parameter 0.8 v shdn input current, sinking i in-, shdn shdn = gnd or v+ 1 a shdn input capacitance c in, shdn (note 1) 10 pf vl output voltage v l i vl = 0ma to 1ma 3.3 v ref output voltage v ref 0a to 30a 1.25 v note 1: guaranteed by design and not production tested. downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r _______________________________________________________________________________________ 3 note 2: specifications from 0c to -40c are guaranteed by design and not production tested. i out = 0ma, sync = gnd v+ rising i out = 0ma, sync = 3.0v v+ falling sync = 3.0v fb = 1.30v sync = 3.0v, pwm duty cycle = 50% shdn = gnd circuit of figure 2 conditions v 3.1 3.5 v +, start startup voltage v 3.0 3.3 v +, uvlo undervoltage lockout a 0.75 1.00 1.50 i lim+ high-side current limit khz 250 300 350 f osc pwm switching frequency ma 0.2 0.6 i v+, pfm quiescent supply current (pfm mode) ma 2.7 4.0 i v+, pwm v 3.5 11.0 v+ supply range quiescent supply current (pwm mode) a 0.10 i fb fb input current v 1.222 1.250 1.278 v fb pwm fb feedback threshold a 2.5 5 i v+, shdn shutdown supply current v 1.25 10.50 v out, range output voltage range units min typ max symbol parameter electrical characteristics (v+ = +7v, pgnd = gnd = 0v, shdn = v+, (t a = -40c to +85c) , unless otherwise noted.) (note 2) __________________________________________typic a l o pe ra t ing cha ra c t e rist ic s (circuit of figure 2, t a = +25c, unless otherwise noted.) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 200 400 600 800 1000 load current (ma) dropout voltage vs. load current max887-01 dropout voltage (v) 3.3v setting v out = 3.135v 5v setting v out = 4.75v 0 10 20 30 40 50 60 70 80 90 100 0.0001 0.001 0.01 0.1 0.6 efficiency (% ) output current (a) efficiency vs. output current max887-02 pwm mode (sync = vl) v out = 3.3v v in = 4v v in = 5v v in = 7v v in = 11v v in = 9v 0 10 20 30 40 50 60 70 80 90 100 0.0001 0.001 0.01 0.1 0.6 efficiency (% ) output current (a) efficiency vs. output current max887-03 pwm mode (sync = vl) v out = 5v v in = 9v v in = 5.5v v in = 11v v in = 7v downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r 4 _______________________________________________________________________________________ ____________________________typic a l ope ra t ing cha ra c t e rist ic s (c ont inue d) (circuit of figure 2, t a = +25c, unless otherwise noted.) 0 10 20 30 40 50 60 70 80 90 100 0.0001 0.001 0.01 0.1 0.6 efficiency (% ) output current (a) efficiency vs. output current max887-04 idle mode (sync = gnd) v out = 3.3v v in = 5v v in = 7v v in = 9v v in = 11v v in = 4v 0 10 20 30 40 50 60 70 80 90 100 0.0001 0.001 0.01 0.1 0.6 efficiency (% ) output current (a) efficiency vs. output current max887-05 idle mode (sync = gnd) v out = 5v v in = 5.5v v in = 9v v in = 7v v in = 11v 0 200 400 600 800 1000 1200 357911131517 maximum output current (ma) supply voltage (v) m axim um output current vs. supply voltage max887-06 guaranteed output current of figure 2 is 600ma 3.3v setting, v out = 3.135v 5v setting, v out = 4.75v 0 200 400 600 800 1000 1200 0 100 200 300 400 500 600 maximum output current (ma) sync frequency (khz) m axim um output current vs. sync frequency max887-07 c2, c3 = 47f l1 = 33h v in = 5v v out = 3.3v v out = -5% at i out(max) 250 260 270 280 290 300 310 320 330 340 350 024681012141618 switching frequency (khz) supply voltage (v) switching frequency vs. supply voltage max887-10 v out = 3.3v 0 0.5 1.5 2.5 3.5 3.0 2.0 1.0 quiescent current (ma) supply voltage (v) quiescent supply current vs. supply voltage max887-08 a a a: v out = 3.3v, pwm mode b: v out = 3.3v, pfm mode 024681012141618 c b 0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 quiescent current (ma) temperature (c) quiescent current vs. tem perature max887-09 pwm mode v in = 5.3v v out = 3.3v pfm mode 250 260 270 280 290 300 310 320 330 340 350 frequency (khz) temperature (c) switching frequency vs. tem perature max887-11 v out = 3.3v -60 -40 -20 0 20 40 60 80 100 120 140 4 -1 10k 10m output ripple and harm onics 0 2 3 1 max887 toc-20 frequency (hz) output noise (mv) 100k 1m v in = 5v v out = 3.3v i out = 500ma pwm mode downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r _______________________________________________________________________________________ 5 ____________________________typic a l ope ra t ing cha ra c t e rist ic s (c ont inue d) (circuit of figure 2, t a = +25c, unless otherwise noted.) v in = 5v, v out = 3.3v, load = 500ma a: lx, 5v/div b: v out , 20mv/div, ac coupled c: inductor current, 500ma/div 1 m s/div heavy-load, pwm -m ode switching waveform s a b c 0ma max887-12 v in = 5v, v out = 3.3v, load = 0ma a: lx, 5v/div b: v out , 20mv/div, ac coupled c: inductor current, 500ma/div 1 m s/div light-load, pwm -m ode switching waveform s a b c max887-13 v in = 5v, v out = 3.3v, load = 0ma a: lx, 5v/div b: v out , 20mv/div, ac coupled c: inductor current, 200ma/div 1 m s/div light-load, pfm -m ode switching waveform s a b c max887-14 v in = 5v, v out = 3.3v, load = 70ma a: lx, 5v/div b: v out , 20mv/div, ac coupled c: inductor current, 200ma/div 10 m s/div m edium -load, pfm -m ode switching waveform s a b c max887-15 downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r 6 _______________________________________________________________________________________ _____________________________typic a l ope ra t ing cha r a c t e rist ic s (c ont inue d) (circuit of figure 2, t a = +25c, unless otherwise noted.) 40 m s/div load-transient response a b c v in = 5v, v out = 3.3v, load = 0ma to 500ma, pwm mode a: lx, 5v/div b: v out , 50mv/div, ac coupled c: load current, 500ma/div max887-16 200 m s/div line-transient response a b v in = 5v to 11v, v out = 3.3v, load = 500ma, pwm mode a: v in , 5v/div b: v out , 20mv/div, ac coupled max887-17 200 m s/div recovery from 100% duty cycle (drop out) a b c v in = 3.3v to 11v, v out = 3.3v, load = 500ma, pwm mode a: v in , 5v/div b: v out , 50mv/div, ac coupled c: lx, 10v/div max887-18 500 m s/div shutdown and startup response a b c d v in = 5v, v out = 3.3v, load = 100ma, pwm mode a: shdn, 5v/div b: v out , 2v/div, ac coupled c: lx, 5v/div d: inductor current, 500ma/div max887-19 downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r _______________________________________________________________________________________ 7 ___________________________________________________ ___________pin de sc ript ion name function 1 shdn shutdown, active-low, logic-level input. connect shdn to v+ for normal operation. 2 fb feedback input. connect fb to a resistor voltage di vider between the output and gnd. pin 3 ref reference bypass output. connect a 0.047f capacito r to gnd very close to the max887, within 0.2 in. ( 5mm). 4 vl 3.3v internal logic regulator output. bypass vl to gnd with a 2.2f capacitor very close to the max887 , within 0.2 in. (5mm). 8 v+ supply-voltage input. 3.5v min to 11v max. bypass v + to gnd with a 0.33f and large-value electrolytic capacitor in parallel. these capacitors must be as close to the v+ and gnd pins as possible. place the 0.33f capacitor within 0.2 in. (5mm) of the max887 . 7 lx inductor connection to the drain of an internal p-c hannel mosfet 6 sync oscillator synchronization and pwm control input. s ync is a logic-level input. tie sync to vl for inte rnal 300khz pwm operation at all loads. the oscillator s ynchronizes to the negative edge of an external clo ck between 10khz and 400khz. the max887 operates in pw m mode when sync is clocked. tying sync to gnd allows a reduced supply-current mode at light l oads. 5 gnd ground pfm current comparator level shifter control & driver logic slope compensation from control logic pwm comparator neglim comparator 0mv in pfm adj. in pwm gnd 0.1x sense fet sense fet 1 w lx v+ 0.1x 1 w pwm ref fb sync pfm comparator overvoltage comparator pwm on signal 50mv fb ref ref fb 25mv 100mv ramp gen sync cell ilim comparator ref vl v+ gnd ref gnd shdn vl figure 1. simplified functional block diagram downloaded from: http:///
_______________de t a ile d de sc ript ion the max887 is a step-down, pulse-width modulation (pwm) dc-dc converter that provides an adjustable output from 1.25v to 10.5v. it accepts inputs from 3.5v to 11v and delivers up to 600ma. an internal mosfet and synchronous rectifier reduce pc board area whil e maintaining high efficiency. cycle-by-cycle current lim- iting protects the internal mosfets and reduces sys - tem stress during overload conditions. operation wi th up to 100% duty cycle for an output of 3v and highe r minimizes dropout voltage. fixed-frequency pwm oper - ation reduces interference in sensitive communicati ons and data-acquisition applications. a sync input all ows synchronization to an external clock. when enabled, idle mode? extends battery life under light loads b y placing the regulator in low quiescent current (200 a typ) pulse-frequency modulation (pfm) operation. shutdown quiescent current is 2.5a typ. pwm cont rol sc he m e the max887 uses an oscillator-triggered minimum/ maximum on-time current-mode control scheme. the minimum on-time is approximately 280ns unless in dropout. the maximum on-time is approximately 4/f osc , allowing operation to 100% duty cycle. current- mode feedback provides cycle-by-cycle current limit - ing for superior load and line response and protect ion of the internal mosfet and rectifier. at each falling edge of the internal oscillator, th e sync cell sends a pwm on signal to the control and drive logic, turning on the internal p-channel mosfet (ma in switch) (figures 1 and 2). this allows current to r amp up through the inductor (figure 2) to the load, and stores energy in a magnetic field. the switch remai ns on until either the current-limit (ilim) comparator is tripped, the maximum on-time is reached (not shown) , or the pwm comparator signals that the output is in regulation. when the switch turns off, during the s ec- ond half of each cycle, the inductors magnetic fie ld collapses, releasing the stored energy and forcing cur- rent through the output diode to the output filter capaci- tor and load. the output filter capacitor stores ch arge when the inductor current is high and releases it w hen the inductor current is low, smoothing the voltage across the load. during normal operation, the max887 regulates outpu t voltage by switching at a constant frequency and th en modulating the power transferred to the load per pu lse using the pwm comparator. a multi-input comparator sums three weighted differential signals (the outpu t voltage with respect to the reference, the main swi tch current sense, and the slope-compensation ramp) and changes states when a threshold is reached. it modu lates output power by adjusting the inductor peak current during the first half of each cycle, based on the o utput error voltage. the max887s loop gain is relatively low to enable the use of a small, low-valued output fil ter capacitor. the resulting load regulation is 2.5% ty p at 500ma. slope compensation is added to account for the inductor current waveforms down slope during t he second half of each cycle, and to eliminate the ind uctor current staircasing characteristic of current-mode con- trollers at high duty cycles. 1 0 0 % dut y-cyc le ope ra t ion for the internal oscillator frequency, the f osc /4 maxi- mum on-time exceeds one cycle and permits operation to 100% duty cycle. as the input voltage drops, the duty cycle increases until the p-channel mosfet is held on continuously and 100% duty cycle is reached . dropout voltage in 100% duty cycle is the output cu r- rent multiplied by the on-resistance of the interna l switch and inductor around 300mv (i out = 500ma). in pwm mode, subharmonic oscillation can occur near dropout, but subharmonic voltage ripple is small, s ince the ripple current is low. when using synchronizati on to an external oscillator, 100% duty cycle is availabl e for sync frequencies higher than f osc /4. sync hronous re c t ific a t ion although an external schottky diode is used as the pri- mary output rectifier, an n-channel synchronous rec tifi- er turns on to reduce power loss across the diode a nd improve efficiency. during the second half of each cycle, when the inductor current ramps below the threshold set by the neglim comparator or when the end of the oscillator period is reached, the synchr onous rectifier turns off. this keeps excess current from flowing m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r 8 _______________________________________________________________________________________ max887 ref r2 100k w r1 165k w 0.047 m f 2.2 m f 47 m f 47 m f c1 100pf 0.33 m f 33 m h v+ lx fb gnd sync vl shdn v out = 3. 3v v out = 1.25v (r1/r2 + 1) v in = 3. 5v to 11v on off figure 2. typical operating circuit downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r _______________________________________________________________________________________ 9 backward through the inductor, from the output filt er capacitor to gnd, or through the switch and synchro - nous rectifier to gnd. during pwm operation, the neglim threshold adjusts to permit small amounts of reverse current to flow from the output during light loads. this allows regulati on with a constant switching frequency and eliminates mini- mum load requirements. the neglim comparator threshold is 0ma if vfb < 1.25v, and decreases as v fb exceeds 1.25v to prevent the output from rising. th e neglim threshold in pfm mode is 0ma. (see forced pwm and idle mode operation. ) forc e d pwm a nd i dle m ode ope ra t ion connect sync to vl for normal forced pwm operation. forced pwm operation is desirable in sensitive rf a nd data-acquisition applications, to ensure that switc hing- noise harmonics do not interfere with sensitive if and data-sampling frequencies. a minimum load is not required during forced pwm operation, since the syn - chronous rectifier passes reverse inductor current as needed to allow constant-frequency operation with n o load. connecting sync to gnd enables idle mode opera- tion. this proprietary control scheme places the max887 in pfm mode at light loads to improve effici en- cy and reduce quiescent current to 200a typ. with idle mode enabled, the max887 initiates pfm operati on when the output current drops below 100ma. during pfm operation, the max887 switches only as needed to service the load, reducing the switching frequen cy and associated losses in the internal switch and synchronous rectifier, schottky diode, and external inductor. during pfm mode, a switching cycle is initiated whe n the pfm comparator senses that the output voltage h as dropped too low. the p-channel mosfet switch turns on and conducts current to the output filter capaci tor and load until the inductor current reaches the pfm peak current limit (100ma). then the switch turns o ff and the magnetic field in the inductor collapses, f orcing current through the output diode to the output filt er capacitor and load. the output filter capacitor sto res charge when the inductor current is high and releas es charge when it is low, smoothing the voltage across the load. then the max887 waits until the pfm comparato r senses a low output voltage again. during pfm mode, the synchronous rectifier is disabled and the exter nal schottky diode is used as an output rectifier. the pfm current comparator controls both entry into pwm mode and the peak switching current during pfm mode. consequently, some jitter is normal during tr an- sition from pfm to pwm modes with loads around 100ma, and has no adverse impact on regulation. output ripple is higher during pfm operation, and t he output filter capacitor should be selected on this basis when pfm mode is used. output ripple and noise are higher during pfm operation. sy n c i nput a nd fre que nc y cont rol the max887h comes with an internal oscillator set f or a fixed switching frequency of 300khz. connect sync t o vl for normal forced-pwm operation. do not leave sync floating. connecting sync to gnd enables idle mode operation to reduce supply current at light lo ads. sync is a logic-level input useful for operating-mo de selection and frequency control. it is a negative e dge triggered input that allows synchronization to an e xter- nal frequency between 25khz and 440khz. when sync is clocked by an external signal, the converte r operates in pwm mode. if sync is low or high for mo re than 100s, the oscillator defaults to 300khz. oper ating at a lower switching frequency reduces quiescent cu r- rent, but reduces maximum load current as well (table 1). for example, at 330khz, maximum output current is 600ma, while at 30khz, maximum output cu r- rent is only 30ma. note that 100% duty cycle will o nly occur for f sync > f osc /4. v l re gula t or the max887 uses an internal 3.3v linear regulator f or logic power in the ic. this logic supply is brought out using the vl pin for bypassing and compensation wit h an external 2.2f capacitor to gnd. connect this capacitor close to the max887, within 0.2in (5mm). shut dow n connecting shdn to gnd places the max887 in a low- current shutdown mode (i q = 2.5a typ at v+ = 7v). in shutdown, the reference, vl regulator, control circ uitry, internal switching mosfet, and the synchronous rect i- fier turn off and the output falls to 0v. connect shdn to v+ for normal operation. curre nt -se nse com pa ra t ors several internal current-sense comparators are used inside the max887. in pwm operation, the pwm com- parator is used for current-mode control. current-m ode control imparts cycle-by-cycle current limiting and pro- vides improved load and line response, allowing tig hter specification of the inductor saturation current li mit to reduce inductor cost. a second 100ma current-sense comparator is used across the p-channel switch to c on- trol entry into pfm mode. a third current-sense com - parator monitors current through the internal n-cha nnel mosfet to set the neglim threshold and determine downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r 10 ______________________________________________________________________________________ when to turn off this synchronous rectifier. a four th comparator (ilim) is used at the p-channel mosfet switch for overcurrent detection. this protects the sys- tem, external components, and internal mosfets under overload conditions. ________________de sign i nform a t ion out put v olt a ge se le c t ion to select an output voltage between 1.25v and 10.5v , connect fb to a resistor voltage divider between th e output and gnd (figure 2). select feedback resistor r2 in the 5k to 100k range, since fb input leakage is 100na max. r1 is then given by: where v fb = 1.25v. a small ceramic capacitor (c1) around 100pf to 470pf should be added in parallel with r1 to compensate for stray capacitance at the fb pin, and output capacitor equivalent series resista nce (esr). i nduc t or se le c t ion a 1.3a inductor with the value recommended in table 1 is sufficient for most applications. however, the e xact inductor value is not critical, and values within 5 0% of those in table 1 are acceptable. for best efficienc y, the inductors dc resistance should be less than 0.25 . the inductor saturation current rating must exceed the 1a i lim current limit. table 2 lists component suppliers. ca pa c it or se le c t ion input and output filter capacitors should be chosen to service inductor currents with acceptable voltage r ip- ple. the input filter capacitor also reduces peak c ur- rents and noise at the voltage source. see table 1 for suggested values. the max887s loop gain is relativ ely low, to enable the use of small, low-valued output filter capacitors. higher values provide improved output r ip- ple and transient response. lower oscillator freque n- cies require a larger-value output capacitor. when idle mode is used, verify capacitor selection with light loads during pfm operation, since output ripple is higher under these conditions. low-esr capacitors are recommended. capacitor esr is a major contributor to output ripple (usually mo re than 60%). ordinary aluminum-electrolytic capacitor s have high esr and should be avoided. low-esr alu- minum-electrolytic capacitors are acceptable and re l- atively inexpensive. low-esr tantalum capacitors are better and provide a compact solution for space - constrained surface-mount designs. do not exceed the ripple current ratings of tantalum capacitors. ceramic capacitors have the lowest esr overall, and os-con capacitors have the lowest esr of the high- value electrolytic types. it is generally not neces sary to use ceramic and os-con capacitors for the max887; they need only be considered in very compact, high- reliability, or wide-temperature applications, wher e the expense is justified. when using very-low-esr capac i- tors, such as ceramic or os-con, check for stabilit y while examining load-transient response, and increa se the compensation capacitor c1 if needed. table 2 li sts suppliers for the various components used with the max887. r1 r2 v v 1 out fb =- ? ? ?? table 1. inductor and output filtervs. sync frequency table 2. component suppliers l1 (h) c out (f) 300C400 33 33 200C300 47 47 150C200 68 68 100C150 100 100 75C100 150 150 sync range (khz) company phone fax avx usa (803) 946-0690 (803) 626-3123 (800) 282-4975 coilcraft usa (847) 639-6400 (847) 639-1469 coiltronics usa (561) 241-7876 (561) 241-9339 dale usa (605) 668-4131 (605) 665-1627 international usa (310) 322-3331 (310) 322-3332 rectifier motorola usa (602) 303-5454 (602) 994-6430 nichicon usa (847) 843-7500 (847) 843-2798 japan 81-7-5231-8461 81-7-5256-4158 nihon usa (805) 867-2555 (805) 867-2698 japan 81-3-3494-7411 81-3-3494-7414 sanyo usa (619) 661-6835 (619) 661-1055 japan 81-7-2070-6306 81-7-2070-1174 siliconix usa (408) 988-8000 (408) 970-3950 (800) 554-5565 sprague usa (603) 224-1961 (603) 224-1430 sumida usa (847) 956-0666 (847) 956-0702 japan 81-3-3607-5111 81-3-3607-5144 united usa (714) 255-9500 (714) 255-9400 chemi-con downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r ______________________________________________________________________________________ 11 bypass v+ to gnd using a 0.33f capacitor. also bypass vl to gnd with a 2.2f capacitor, and vref t o gnd using a 0.047f capacitor. these capacitors should be placed within 0.2in (5mm) of their respec tive pins. a small ceramic capacitor (c1) of around 100p f to 470pf should be added in parallel with r1 to com - pensate for stray capacitance at the fb pin and out put capacitor esr. out put diode se le c t ion a 1a external diode (d1) is required as an output r ecti- fier to pass inductor current during the second hal f of each cycle. this diode operates in pfm mode and dur - ing transition periods while the synchronous rectif ier is off. use a schottky diode to prevent the slow inter nal diode of the n-channel mosfet from turning on. pc boa rd la yout a nd rout ing high switching frequencies and large peak currents make pc board layout a very important part of desig n. poor design can result in excessive emi on the feed - back paths and voltage gradients in the ground plan e, both of which can result in instability or regulati on errors. power components, such as the max887, inductor, input filter capacitor, and output filter capaci- tor should be placed as close together as possible, and their traces kept short, direct, and wide. conn ect their ground pins at a common node in a star-ground configuration. keep the extra copper on the board a nd integrate into ground as a pseudo-ground plane. the external voltage-feedback network should be very close to the fb pin, within 0.2in (5mm). keep noisy traces, such as from the lx pin, away from the volt age- feedback network, and separate using grounded cop- per. place the small bypass capacitors (c1, c3, c5, and c6) within 0.2in (5mm) of their respective pins . the max887 evaluation kit manual illustrates an example pc board layout, routing, and pseudo-ground plane. ___________________chip i nform a t ion transistor count: 2006 substrate connected to gnd downloaded from: http:///
m ax 8 8 7 1 0 0 % dut y cyc le , low -n oise , st e p-dow n, pwm dc-dc conve rt e r 12 ______________________________________________________________________________________ dim a a1 b c e e h l min 0.053 0.004 0.014 0.007 0.150 0.228 0.016 max 0.069 0.010 0.019 0.010 0.157 0.244 0.050 min 1.35 0.10 0.35 0.19 3.80 5.80 0.40 max 1.75 0.25 0.49 0.25 4.00 6.20 1.27 inches millimeters 21-0041a narrow so small-outline package (0.150 in.) dim d d d min 0.189 0.337 0.386 max 0.197 0.344 0.394 min 4.80 8.55 9.80 max 5.00 8.75 10.00 inches millimeters pins 8 14 16 1.27 0.050 l 0-8 h e d e a a1 c 0.101mm 0.004in. b ___________________________________________________ _____pa c k a ge i nform a t ion downloaded from: http:///

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